1. Field of the Invention
This invention relates to electronic amplifiers, particularly to such amplifiers as are useful at high voltage levels and which convert a binary input signal into an amplified analog high voltage output signal.
2. Description of the Prior Art
High voltage transistorized amplifiers have generally been a design problem, since high voltage semiconductor devices are inherently sensitive to permanent destruction due to transient voltages and are difficult and expensive to produce. Accordingly, high voltage amplifiers such as those useful in electrostatic deflection circuits are still commonly designed with vacuum tubes. One technique in which semiconductor devices have become used in such applications requires the cascading of several transistor stages, each being DC coupled to the preceding stage and each being operated at a successively higher average DC level. Such a technique has heretofore required that each stage be coupled in some manner directly to ground, thus necessitating the use of additional and generally expensive components. In U.S. Pat. No. 2,943,269 (Randise), there is disclosed an AC coupled amplifier having such a succession of serially connected transistors. The first transistor in the succession is coupled as a common emitter input stage and the remaining transistors are connected as common base stages. A last transistor in the succession is connected through a common load resistor to a source of DC potential. The base of each transistor in the succession is connected both to a DC voltage divider network and to an AC impedance network to control the AC voltage gain of that stage. Such a configuration allows nearly the entire source of DC potential to be developed across a single stage and its associated AC impedance network, thereby precluding the selection of inexpensive components in high voltage use.
U.S. Pat. No. 3,736,519 (Smyth) discloses an impedance follower circuit including a succession of serially connected common-base transistors having the base of each transistor in the succession connected to successive nodes in a resistive voltage divider network so as to distribute a high voltage equally across each transistor in the succession. The output of the succession is controllably switched to a second emitter follower network to control the maximum current output. That circuit is adapted for controlling the output of a DC power supply, and is not concerned with frequency response limitations.
It is known to convert low voltage digital signals to low voltage analog signals by a variety of techniques. One such technique, disclosed in U.S. Pat. No. 3,560,958 (Braymer), involves the selective switching of a plurality of binary weighted current sources in response to a given binary input signal, summing the output of all the switched current sources at a common node, and applying the summed current to a current/voltage converter to provide an analog voltage corresponding to the input binary signals. No provision is made for amplifying the resultant analog voltage to high voltage levels.